Join to apply for the Principal Design Verification Engineer role at Astera Labs
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Join to apply for the Principal Design Verification Engineer role at Astera Labs
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions grounded in open standards. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs Intelligent Connectivity Platform integrates CXL, Ethernet, PCIe, and UALink semiconductor-based technologies with the companys COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. Discover more at
Job Description We are seeking a Principal Design Verification Engineer with strong problem-solving abilities and a passion for developing robust verification methodologies for complex ASICs. The ideal candidate will have a solid background in SystemVerilog and experience with C/C++, Python, or similar scripting languages. This role involves full lifecycle verificationfrom planning and test development to debugging and coverage closurecontributing to the success of cutting-edge SoC designs. Key ResponsibilitiesReferrals increase your chances of interviewing at Astera Labs by 2x
San Jose, CA $150,000.00-$230,000.00 4 days ago
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Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago
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Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago
San Jose, CA $175,000.00-$225,000.00 4 days ago
San Jose, CA $160,000.00-$240,000.00 4 days ago
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Mountain View, CA $107,900.00-$242,000.00 3 weeks ago
Santa Clara, CA $97,700.00-$182,624.00 2 days ago
Sunnyvale, CA $142,000.00-$203,000.00 2 weeks ago
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Sunnyvale, CA $173,000.00-$249,000.00 2 weeks ago
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Santa Clara, CA $161,250.00-$260,000.00 6 months ago
San Jose, CA $150,000.00-$275,000.00 2 weeks ago
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